RAM 6.0 BUX II Series Guía de usuario Pagina 6
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BSP Developer’s Guide, 6.0
vi
3.3.2 Projects ....................................................................................................... 73
3.3.3 Adding Other Timers .............................................................................. 73
3.3.4 NVRAM .................................................................................................... 74
3.3.5 Cache, MMU, and DMA Devices ........................................................... 75
3.3.6 Boot ROMs ............................................................................................... 77
3.3.7 Providing Bus Interface Support ........................................................... 77
PCI Bus Interface Support ...................................................................... 77
PCI Configuration Example ................................................................... 89
PCI Show Routines .................................................................................. 95
VME Bus Interface Support ................................................................... 97
USB Bus Interface Support ..................................................................... 98
3.3.8 Updating BSP-Specific Documentation ............................................... 98
3.3.9 Providing Additional Optional Device Support ................................. 99
Adding Ethernet Devices ....................................................................... 99
Generic Driver Introduction .................................................................. 102
Multi-Mode Serial (SIO) Drivers ........................................................... 103
Serial Drivers ............................................................................................ 106
Timer ......................................................................................................... 106
Power Management ................................................................................ 107
Non-Volatile Memory ............................................................................. 109
Scaling RAM Size .................................................................................... 110
Multi-Function Devices .......................................................................... 111
SCSI-2 Devices ......................................................................................... 112
Troubleshooting and Debugging .......................................................... 112
4 Debugging Your BSP ........................................................................... 115
4.1 Introduction ............................................................................................................. 115
Stages of BSP Debugging ....................................................................... 115
4.2 Basic Debugging Techniques .............................................................................. 116
4.2.1 Using LEDs as a Diagnostic Tool .......................................................... 117
4.2.2 Verifying the Image Location ................................................................. 117
Finding Addresses in the Image File ..................................................... 117
Finding Addresses in the Flash image ................................................. 118
Finding Addresses in RAM .................................................................... 121
- BSP DEVELOPER’S GUIDE 1
- U.S.): (800) 545-WIND 2
- Contents 3
- Contents 5
- Introduction 9
- BSP Developer’s Guide, 6.0 10
- 1.3 BSP Development Process 11
- 1.4 Terminology 12
- Overview of a BSP 13
- 2.2 Boot Sequence 15
- 2.2.1 Sequence Overview 16
- 2 Overview of a BSP 17
- Step 1: Execute romInit( ) 23
- Step 4: Execute usrInit( ) 25
- TCB) from the top 27
- 2.3 Components of a BSP 28
- USRCONFIG = usrConfig.c 29
- 2.3.2 Derived Files 36
- 2.3.4 Required Routines 40
- /* lock interrupts */ 46
- 2.3.5 Required Macros 47
- ROM_TEXT_ADRS. The offset 48
- 2.3.6 Optional Routines 50
- 2.4.1 BSP Debugging Methods 52
- 2.4.3 The Wind River IDE 56
- 2.4.5 Download Path 57
- 2.5 Avoiding Common Problems 61
- Porting a BSP to 63
- Custom Hardware 63
- 3.2.1 Initializing the Board 64
- 3.2.2 Initializing Memory 65
- LED Routines 70
- #undef INCLUDE_WDB_VIO 75
- 3.2.7 Interrupt Controllers 78
- 3.2.8 ISR Guidelines 78
- 3.2.9 DMA 78
- 3.2.11 Serial Drivers 79
- 3.3.2 Projects 81
- 3.3.3 Adding Other Timers 81
- 3.3.4 NVRAM 82
- 3.3.6 Boot ROMs 85
- FUNCPTR * pArg 89
- UINT * pArg 89
- 3.3 Finalizing Your BSP 101
- Generic Driver Introduction 110
- One-Shot Timer Examples 116
- Non-Volatile Memory 117
- Debugging Your BSP 123
- 4 Debugging Your BSP 127
- 4.2.3 Verifying RAM 129
- For example: 133
- 4.3.1 Symbols 134
- 4.3.2 Breakpoints 134
- Common Development Issues 139
- Image Locations 140
- A.3 Cache and MMU 141
- Timing Issues 142
- A.4 Reusing Unportable Code 143
- A.5 Volatile Variables 143
- Documentation Guidelines 145
- B.1 Introduction 146
- B.2 Written Style 146
- Use... Not 147
- B Documentation Guidelines 149
- Acronyms 152
- Board Names 153
- NAME Section 154
- B.4 Sections for target.ref 161
- B.5 Format and Style 163
- Ta b le B -5 Apigen Markup 166
- Component Input Output 170
- Command Syntax 174
- Board Diagrams 174
- B.6 Directives 175
- Directive Name Usage 176
- \IMAGE images/board.jpg 178
- \IMAGE images/switches.gif 178
- (apigen or refgen -mg) 182
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