RAM 6.0 BUX II Series Guía de usuario Pagina 105
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3 Porting a BSP to Custom Hardware
3.3 Finalizing Your BSP
97
3
All values are numeric—pciHeaderShow( ) does not make any attempt to
interpret register values.
-> pciHeaderShow(0,16,1)
vendor ID = 0x1033
device ID = 0x0035
command register = 0x0006
status register = 0x0210
revision ID = 0x41
class code = 0x0c
sub class code = 0x03
programming interface = 0x10
cache line = 0x08
latency time = 0x00
header type = 0x00
BIST = 0x00
base address 0 = 0x80001000
base address 1 = 0x00000000
base address 2 = 0x00000000
base address 3 = 0x00000000
base address 4 = 0x00000000
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x14db
sub system ID = 0x0035
expansion ROM base address = 0x00000000
interrupt line = 0x17
interrupt pin = 0x02
min Grant = 0x01
max Latency = 0x2a
value = 0 = 0x0
->
VME Bus Interface Support
To include support for a VME bus interface, you must determine which VME bus
controller is used on your target system and include a driver for that controller. The
drivers for most standard VME bus controllers are located in target/src/drv/vme. If
the drivers in that directory are not applicable to your target system, you may need
to provide your own driver. In this case, the template VME driver (templateVme.c)
can be used as a starting point for a custom driver. However, if one of the standard
drivers provided is very similar to the device you are using, you may wish to use
that driver as a starting point. Your reference BSP may also include VME support
for your device (or a similar device). If this is the case, you can use the custom VME
driver included in the reference BSP.
In addition to the VME bus controller driver, you must configure the addresses to
use for the A16, A24, and A32 address spaces on the VME bus. Normally, the
macros
VME_A32_MSTR_LOCAL, VME_A32MSTR_SIZE, VME_A24_MSTR_LOCAL,
- BSP DEVELOPER’S GUIDE 1
- U.S.): (800) 545-WIND 2
- Contents 3
- Contents 5
- Introduction 9
- BSP Developer’s Guide, 6.0 10
- 1.3 BSP Development Process 11
- 1.4 Terminology 12
- Overview of a BSP 13
- 2.2 Boot Sequence 15
- 2.2.1 Sequence Overview 16
- 2 Overview of a BSP 17
- Step 1: Execute romInit( ) 23
- Step 4: Execute usrInit( ) 25
- TCB) from the top 27
- 2.3 Components of a BSP 28
- USRCONFIG = usrConfig.c 29
- 2.3.2 Derived Files 36
- 2.3.4 Required Routines 40
- /* lock interrupts */ 46
- 2.3.5 Required Macros 47
- ROM_TEXT_ADRS. The offset 48
- 2.3.6 Optional Routines 50
- 2.4.1 BSP Debugging Methods 52
- 2.4.3 The Wind River IDE 56
- 2.4.5 Download Path 57
- 2.5 Avoiding Common Problems 61
- Porting a BSP to 63
- Custom Hardware 63
- 3.2.1 Initializing the Board 64
- 3.2.2 Initializing Memory 65
- LED Routines 70
- #undef INCLUDE_WDB_VIO 75
- 3.2.7 Interrupt Controllers 78
- 3.2.8 ISR Guidelines 78
- 3.2.9 DMA 78
- 3.2.11 Serial Drivers 79
- 3.3.2 Projects 81
- 3.3.3 Adding Other Timers 81
- 3.3.4 NVRAM 82
- 3.3.6 Boot ROMs 85
- FUNCPTR * pArg 89
- UINT * pArg 89
- 3.3 Finalizing Your BSP 101
- Generic Driver Introduction 110
- One-Shot Timer Examples 116
- Non-Volatile Memory 117
- Debugging Your BSP 123
- 4 Debugging Your BSP 127
- 4.2.3 Verifying RAM 129
- For example: 133
- 4.3.1 Symbols 134
- 4.3.2 Breakpoints 134
- Common Development Issues 139
- Image Locations 140
- A.3 Cache and MMU 141
- Timing Issues 142
- A.4 Reusing Unportable Code 143
- A.5 Volatile Variables 143
- Documentation Guidelines 145
- B.1 Introduction 146
- B.2 Written Style 146
- Use... Not 147
- B Documentation Guidelines 149
- Acronyms 152
- Board Names 153
- NAME Section 154
- B.4 Sections for target.ref 161
- B.5 Format and Style 163
- Ta b le B -5 Apigen Markup 166
- Component Input Output 170
- Command Syntax 174
- Board Diagrams 174
- B.6 Directives 175
- Directive Name Usage 176
- \IMAGE images/board.jpg 178
- \IMAGE images/switches.gif 178
- (apigen or refgen -mg) 182
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