RAM 6.0 BUX II Series Guía de usuario descargar pdf (Pagina 184)

VxWorks

BSP Developer’s Guide, 6.0

176

BSP development process 3

time required 3

BSP directories

vtsLogs 23

BSP files

bootInit.c 27

bspname.h 23

config.h 23

configAll.h 27

Makefile 23

README 22

romInit.s 25

sysALib.s 24

sysDev.c 26

sysLb.c 25

target.nr 26

target.ref 26

usrConfig.c 28

BSP macros 39

BSP_REV 40

BSP_VER_1_2 40

BSP_VERSION 40

LOCAL_MEM_SIZE 41

RAM_HIGH_ADRS 40

BSP routines

optional 42

required routines 32

sysBspRev( ) 33

sysClkDisable( ) 33

sysClkEnable( ) 33

sysClkInt( ) 33

sysClkRateGet( ) 33

sysClkRateSet( ) 33

sysHwInit( ) 36

sysHwInit2( ) 36

sysMemTop( ) 34

sysModel( ) 35

sysNvRamGet( ) 36

sysNvRamSet( ) 36

sysSerialChanGet( ) 36

sysSerialHwInit( ) 36

sysSerialHwInit2( ) 36

sysToMonitor( ) 37

BSP_REV 40

BSP_VER_1_2 40

BSP_VERSION 40

bspname.h 21, 23

building a VxWorks image 69

bus interface support 77

PCI 77

C

cache 74, 133

timing issues 134

cache support

custom 75

cacheLibInit( ) 75

callbackInstall( ) 105

coding conventions

filename extensions 171

common problems

cache and MMU 133

conflicts between virtual and physical

memory 135

reusing code 135

volatile variables 135

compiler

choosing a 48

config.h 23

BSP_REV 40

BSP_VER_1_2 40

BSP_VERSION 40

LOCAL_MEM_SIZE 41

macros 39

RAM_HIGH_ADRS 40

configAll.h 27

creating additional diagnostic routines 62

D

data address in virtual memory environments 113

data coherency problems 112

DATASEGPAD 21

dataSegPad.c

DATASEGPAD 21

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