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7. Devices

after reset, some programming of the device or other circuits must be done at

kernel initialization time, to cause the device to de-assert its signal. The sort of

device-specific knowledge needed to do this is usually contained only in the

device’s driver. It is not appropriate to duplicate this sequence within the

kernel initialization routines.

The only other mandatory requirement for interrupt design is to provide a well

diagramed and documented interrupt vector scheme. Even in a flexible

open-ended design, documentation should mention default vectors and priorities

(if selectable) for the devices on the board.

Some people are confused about the terminology used in discussing interrupts.

Interrupt level refers to an interrupt’s input priority. Priority levels are the means

by which devices interrupt the processor. Interrupt vectors are the ID numbers

used to identify the correct interrupt service routine in response to an interrupt.

Drivers attach service routines to interrupt vectors. Drivers enable and disable

interrupt levels. Also note that while it is normal for a driver to enable the interrupt

level when it is initializing a device, it should not disable the interrupt level when

disconnecting from the device. This is because other devices may share the same

interrupt level.

Wind River Technical Note #46 discusses the creation of standard interrupt controller

devices for use in certain architectures. Refer to this technical note for further

information.

System Clock

A system clock interrupt is mandatory. The system clock for VxWorks requires an

interrupt between 30 Hz and ~2 kHz.

The default is 60 Hz and it is desirable to generate this frequency exactly. Relying

on baud-rate generators often makes this precision unattainable.

Auxiliary Clock

VxWorks uses an auxiliary clock from 30 Hz to ~2 kHz to profile CPU utilization.

This is required by the spy utility. It is useful to have a 24-bit (or greater) counter

driven at a high frequency (~10 MHz) for profiling performance.

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