RAM 6.0 BUX II Series Guía de usuario descargar pdf (Pagina 11)

5. Memory

Higher-level transcendental functions are supported in VxWorks in one of these

ways:

■

A portable version that avoids using any floating-point instructions is

standard, but can be replaced with an optimized (assembly language) version

for certain architectures with floating-point capabilities. For more information

on selecting optional features, see the configuration discussion in your

VxWorks programmer’s guide.

■

For floating-point intensive applications, coprocessors offer significant

performance advantages.

Other Issues

Other features worth consideration include the following:

■

The endian byte order selection is transparent to full VxWorks

functionality. However, some BSPs support only one byte order. For

information on which byte orders are supported, refer to the BSP.

■

An architecture with indivisible read-modify-write operation, such as

test-and-set, is necessary for high-performance backplane network

communication.

■

It is recommended that NMIs be used only for system reboot. On some

architectures, NMIs are completely precluded except to reboot the system.

On other architectures, non-maskable interrupts must be restricted to

events that require no operating system support.

5. Memory

This section discusses the following issues:

■

RAM

■

ROM

■

Ethernet RAM

■

NVRAM

■

parity checking

■

addressing

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RAM 6.0 BUX II Series Guía de usuario Pagina 11