RAM 6.0 BUX II Series Guía de usuario descargar pdf (Pagina 17)

6. Bus Support

Multiple bus request/grant levels may be critical for systems with many masters

in the backplane; with round-robin arbitration it can guarantee timely access to the

bus for each bus master.

If masters on the same level are daisy chained, the masters far down the bus may

become “starved.”

Arbitration/System Controller

The system controller functionality should be optional and selected by a jumper.

The system controller should not be enabled through a register that can be set by

software. The ability for software to read the system controller state (on/off) is

useful.

The bus system controller should assert the bus RESET signal when a “local” reset

is initiated.

The system controller need not arbitrate all bus levels, but if it only arbitrates one

level, it is usually level 3.

It is the responsibility of the system controller to time out and assert the BERR

signal for slave processors. Better implementations allow this timeout to be

selected from as fast as 16 microseconds to as slow as forever. A system controller

LED is useful for alerting the user to the state of the arbitration logic.

Mailbox Interrupts

Mailbox interrupts and location monitors are similar mechanisms that may be

used as inter-processor synchronization methods.

A mailbox allows the interrupter to pass some information, usually a short or long

word, to the receiver, while a location monitor only causes an interrupt and has no

capability to pass data.

VxWorks uses these mechanisms for synchronization when transmitting network

packets between nodes in the backplane. Without them, VxWorks must rely on an

inefficient polling mechanism that degrades backplane network throughput. One

mailbox or location monitor is used currently, but two or more would be better.

VxWorks can use VME interrupts to drive the backplane driver; this is preferable

to polling but not as good as mailbox interrupts.

No information is actually passed by VxWorks when using mailbox interrupts;

only their interrupt capability is used.

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 35 36

Sin comentarios

RAM 6.0 BUX II Series Guía de usuario Pagina 17