RAM 4.5 BUX II Series Manual de usuario descargar pdf (Pagina 22)

DE1 User Manual

The image in Figure 3.9 is stored in an M4K memory block in the Cyclone II FPGA. It is loaded

into the M4K block in the MIF/Hex(Intel) format during the default bit stream configuration stage.

We will next describe how you can display other images and use your own images to generate the

binary data patterns that can be displayed on the VGA monitor.

Another image is provided in the file picture.dat in the folder DE1_demonstrations\pictures on the

DE1 System CD-ROM. You can display this image as follows:

• Select the SRAM page of the Control Panel and load the file picture.dat into the SRAM.

• Select the TOOLS page and choose Asynchronous 1 for the SRAM multiplexer port as

shown in Figure 3.10. Click on the Configure button to activate the multi-port setup.

Figure 3.10. Use the Asynchronous Port 1 to access the image data in the SRAM.

• The FPGA is now configured as indicated in Figure 3.11.

• Select the VGA page and deselect the checkbox Default Image.

• The VGA monitor should display the picture.dat image from the SRAM, as depicted in

Figure 3.12. You can turn off the cursor by deselecting the Cursor Enable checkbox.

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RAM 4.5 BUX II Series Manual de usuario Pagina 22